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93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C 93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C 93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C 93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
1K-16K Microwire Compatible Serial EEPROMs
Features:
* Densities from 1 Kbits through 16 Kbits * Low-power CMOS technology * Available with or without ORG function: With ORG function: - ORG pin at Logic Low: 8-bit word - ORG pin at Logic High: 16-bit word Without ORG function: - `A' version: 8-bit word - `B' version: 16-bit word Program Enable pin: - Write-protect for entire array (93XX76C and 93XX86C only) Self-timed Erase/Write cycles (including auto-erase) Automatic ERAL before WRAL Power-on/off data protection circuitry Industry standard 3-wire serial I/O Device Status signal (Ready/Busy) Sequential Read function 1,000,000 E/W cycles Data retention > 200 years Pb-free and RoHS compliant Temperature ranges supported: - Industrial (I) - Automotive (E) -40C to +85C -40C to +125C
Description:
Microchip Technology Inc. supports the 3-wire Microwire bus with low-voltage serial Electrically Erasable PROMs (EEPROM) that range in density from 1 Kbits up to 16 Kbits. Each density is available with and without the ORG functionality, and selected by the part number ordered. Advanced CMOS technology makes these devices ideal for low-power, nonvolatile memory applications. The entire series of Microwire devices are available in the standard 8-lead PDIP and SOIC packages, as well as the more advanced packaging such as the 8-lead MSOP, 8-lead TSSOP, 6-lead SOT-23, and 8-lead DFN (2x3). All packages are Pb-free.
*
* * * * * * * * * *
Pin Diagrams (not to scale)
PDIP/SOIC (P, SN) CS 1 8 7 6 5 VCC
(2,3)
ROTATED SOIC (ex: 93LC46BX)
(1,3)
NC VCC
(1,3)
1 2 3 4
8 7 6 5
ORG VSS DO DI
CLK 2 DI DO 3 4
PE ORG VSS
CS CLK
DFN (MC) CS CLK DI DO TSSOP/MSOP (ST, MS) 1 2 3 4 8 7 6 5 VCC PE(2,3) ORG(1,3) VSS SOT-23 (OT) VCC DO PE(2,3) VSS ORG(1,3) DI VSS 1 2 3 6 5 4 VCC CS CLK
Pin Function Table
Name CS CLK DI DO VSS PE ORG VCC Note: Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Program Enable Memory Configuration Power Supply ORG and PE functionality not available in all products. See Table 1-1, Device Selection Table. Function
CS CLK DI DO
1 2 3 4
8 7 6 5
Note 1: ORG pin: Only on 93XX46C/56C/66C/76C/86C. 2: PE pin: Only on 93XX76C/86C. 3: ORG/PE: No internal connections on 93XXA/B.
(c) 2007 Microchip Technology Inc.
DS21929D-page 1
93XX46X/56X/66X/76X/86X
TABLE 1-1:
Part Number 93XX46A/B/C 93AA46A 93AA46B 93AA46C 93LC46A 93LC46B 93LC46C 93C46A 93C46B 93C46C 93AA46AX 93AA46BX 93AA46CX 93LC46AX 93LC46BX 93LC46CX 93C46AX 93C46BX 93C46CX 93XX56A/B/C 93AA56A 93AA56B 93AA56C 93LC56A 93LC56B 93LC56C 93C56A 93C56B 93C56C 93XX66A/B/C 93AA66A 93AA66B 93AA66C 93LC66A 93LC66B 93LC66C 93C66A 93C66B 93C66C 4 4 4 4 4 4 4 4 4 1.8-5.5 1.8-5.5 1.8-5.5 2.5-5.5 2.5-5.5 2.5-5.5 4.5-5.5 4.5-5.5 4.5-5.5 No No Yes No No Yes No No Yes 512 x 8 bits 256 x 16 bits Selectable x8 or x16 512 x 8 bits 256 x 16 bits Selectable x8 or x16 512 x 8 bits 256 x 16 bits Selectable x8 or x16 No No No No No No No No No I I I I, E I, E I, E I, E I, E I, E P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC 2 2 2 2 2 2 2 2 2 1.8-5.5 1.8-5.5 1.8-5.5 2.5-5.5 2.5-5.5 2.5-5.5 4.5-5.5 4.5-5.5 4.5-5.5 No No Yes No No Yes No No Yes 256 x 8 bits 128 x 16 bits Selectable x8 or x16 256 x 8 bits 128 x 16 bits Selectable x8 or x16 256 x 8 bits 128 x 16 bits Selectable x8 or x16 No No No No No No No No No I I I I, E I, E I, E I, E I, E I, E P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1.8-5.5 1.8-5.5 1.8-5.5 2.5-5.5 2.5-5.5 2.5-5.5 4.5-5.5 4.5-5.5 4.5-5.5 1.8-5.5 1.8-5.5 1.8-5.5 2.5-5.5 2.5-5.5 2.5-5.5 4.5-5.5 4.5-5.5 4.5-5.5 No No Yes No No Yes No No Yes No No Yes No No Yes No No Yes 128 x 8 bits 64 x 16 bits Selectable x8 or x16 128 x 8 bits 64 x 16 bits Selectable x8 or x16 128 x 8 bits 64 x 16 bits Selectable x8 or x16 128 x 8 bits 64 x 16 bits Selectable x8 or x16 128 x 8 bits 64 x 16 bits Selectable x8 or x16 128 x 8 bits 64 x 16 bits Selectable x8 or x16 No No No No No No No No No No No No No No No No No No I I I I, E I, E I, E I, E I, E I, E I I I I, E I, E I, E I, E I, E I, E P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, OT, MC P, SN, ST, MS, MC
DEVICE SELECTION TABLE
Density (Kbits) VCC Range ORG Pin Organization (Words) PE Pin Temp Range Packages
93AA46AX/BX/CX, 93LC46AX/BX/CX, 93C46AX/BX/CX (Alternate pinout with die rotated 90)
DS21929D-page 2
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
TABLE 1-1:
Part Number 93XX76A/B/C 93AA76A 93AA76B 93AA76C 93LC76A 93LC76B 93LC76C 93C76A 93C76B 93C76C 93XX86A/B/C 93AA86A 93AA86B 93AA86C 93LC86A 93LC86B 93LC86C 93C86A 93C86B 93C86C 16 16 16 16 16 16 16 16 16 1.8-5.5 1.8-5.5 1.8-5.5 2.5-5.5 2.5-5.5 2.5-5.5 4.5-5.5 4.5-5.5 4.5-5.5 No No Yes No No Yes No No Yes 2048 x 8 bits 1024 x 16 bits Selectable x8 or x16 2048 x 8 bits 1024 x 16 bits Selectable x8 or x16 2048 x 8 bits 1024 x 16 bits Selectable x8 or x16 No No Yes No No Yes No No Yes I I I I, E I, E I, E I, E I, E I, E OT OT P, SN, ST, MS, MC OT OT P, SN, ST, MS, MC OT OT P, SN, ST, MS, MC 8 8 8 8 8 8 8 8 8 1.8-5.5 1.8-5.5 1.8-5.5 2.5-5.5 2.5-5.5 2.5-5.5 4.5-5.5 4.5-5.5 4.5-5.5 No No Yes No No Yes No No Yes 1024 x 8 bits 512 x 16 bits Selectable x8 or x16 1024 x 8 bits 512 x 16 bits Selectable x8 or x16 1024 x 8 bits 512 x 16 bits Selectable x8 or x16 No No Yes No No Yes No No Yes I I I I, E I, E I, E I, E I, E I, E OT OT P, SN, ST, MS, MC OT OT P, SN, ST, MS, MC OT OT P, SN, ST, MS, MC
DEVICE SELECTION TABLE (CONTINUED)
Density (Kbits) VCC Range ORG Pin Organization (Words) PE Pin Temp Range Packages
(c) 2007 Microchip Technology Inc.
DS21929D-page 3
93XX46X/56X/66X/76X/86X
2.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings()
VCC.............................................................................................................................................................................7.0V All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V Storage temperature ...............................................................................................................................-65C to +150C Ambient temperature with power applied ................................................................................................-40C to +125C ESD protection on all pins ...................................................................................................................................................... 4 kV
NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
TABLE 2-1:
DC CHARACTERISTICS
VCC = 1.8V to 5.5V Industrial (I): TA = -40C to +85C Automotive (E): TA = -40C to +125C Min. 2.0 0.7 VCC -0.3 -0.3 -- -- 2.4 VCC-0.2 -- -- -- -- -- -- Typ. -- -- -- -- -- -- -- -- -- -- -- -- -- 500 -- -- 100 -- -- Max. VCC +1 VCC +1 0.8 0.2 VCC 0.4 0.2 -- -- 1 1 7 2 3 -- 1 500 -- 1 5 Units V V V V V V V V A A pF mA mA A mA A A A A Conditions VCC 2.7V VCC < 2.7V VCC 2.7V VCC < 2.7V IOL = 2.1 mA, VCC = 4.5V IOL = 100 A, VCC = 2.5V IOH = -400 A, VCC = 4.5V IOH = -100 A, VCC = 2.5V VIN = VSS to VCC VOUT = VSS to VCC VIN/VOUT = 0V (Note 1) TA = 25C, FCLK = 1 MHz FCLK = 3 MHz, VCC = 5.5V (93XX46X/56X/66X) FCLK = 3 MHz, VCC = 5.5V (93XX76X/86X) FCLK = 2 MHz, VCC = 2.5V FCLK = 3 MHz, VCC = 5.5V FCLK = 2 MHz, VCC = 3.0V FCLK = 2 MHz, VCC = 2.5V I-Temp (Note 2, 3) E-Temp CLK = Cs = 0V ORG = DI = VSS or VCC 93AAX6A/B/C, 93LCX6A/B/C, 93CX6A/B/C (Note 1)
All parameters apply over the specified ranges unless otherwise noted. Param. Symbol No. D1 D2 D3 D4 D5 D6 D7 D8 VIH1 VIH2 VIL1 VIL2 VOL1 VOL2 VOH1 VOH2 ILI ILO CIN, COUT Parameter High-level input voltage Low-level input voltage Low-level output voltage High-level output voltage Input leakage current Output leakage current Pin capacitance (all inputs/outputs)
ICC write Write current
D9
ICC read Read current
-- -- -- -- --
D10
ICCS
Standby current
D11 Note 1: 2: 3:
VPOR
VCC voltage detect
-- --
1.5V 3.8V
-- --
V V
This parameter is periodically sampled and not 100% tested. ORG and PE pins not available on `A' or `B' versions. Ready/Busy status must be cleared from DO, see Section 4.4 "Data Out (DO)".
DS21929D-page 4
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
TABLE 2-2: AC CHARACTERISTICS
VCC = 1.8V to 5.5V Industrial (I): TA = -40C to +85C Automotive (E): TA = -40C to +125C Min. -- Max. 3 2 1 -- Units MHz MHz MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms Conditions 4.5V VCC < 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V 4.5V VCC < 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V 4.5V VCC < 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V 4.5V VCC < 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V 1.8V VCC < 5.5V 1.8V VCC < 5.5V 4.5V VCC < 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V 4.5V VCC < 5.5V 2.5V VCC < 4.5V 1.8V VCC < 2.5V 4.5V VCC < 5.5V, CL = 100 pF (93C76X/86X) 4.5V VCC < 5.5V, CL = 100 pF 2.5V VCC < 4.5V, CL = 100 pF 1.8V VCC < 2.5V, CL = 100 pF 4.5V VCC < 5.5V, (Note 1) 1.8V VCC < 4.5V, (Note 1) 4.5V VCC < 5.5V, CL = 100 pF 2.5V VCC < 4.5V, CL = 100 pF 1.8V VCC < 2.5V, CL = 100 pF Erase/Write mode 93XX76X/86X (AA and LC versions) 93XX46X/56X/66X (AA and LC versions) 93C46X/56X/66X/76X/86X ERAL mode, 4.5V VCC 5.5V WRAL mode, 4.5V VCC 5.5V
All parameters apply over the specified ranges unless otherwise noted. Param. Symbol No. A1 FCLK Parameter Clock frequency
A2
TCKH
Clock high time
200 250 450 100 200 450 50 100 250 0 250 50 100 250 50 100 250 -- --
A3
TCKL
Clock low time
--
A4
TCSS
Chip Select setup time
--
A5 A6 A7
TCSH TCSL TDIS
Chip Select hold time Chip Select low time Data input setup time
-- -- --
A8
TDIH
Data input hold time
--
A9
TPD
Data output delay time
100 200 250 400 100 200 200 300 500 5
A10 A11
TCZ TSV
Data output disable time Status valid time
-- --
A12
TWC
Program cycle time
--
-- A13 A14 A15 A16 Note 1: 2: TWC TEC TWL -- Endurance Program cycle time -- -- -- 1M
6 2 6 15 --
ms ms ms ms
cycles 25C, VCC = 5.0V, (Note 2)
This parameter is periodically sampled and not 100% tested. This application is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total EnduranceTM Model which may be downloaded from Microchip's web site at www.microchip.com.
(c) 2007 Microchip Technology Inc.
DS21929D-page 5
93XX46X/56X/66X/76X/86X
FIGURE 2-1:
CS VIH VIL VIH CLK VIL TDIS VIH DI VIL TPD DO (Read) VOH VOL TCZ TSV Status Valid TPD TCZ TDIH TCSS TCKH TCKL TCSH
SYNCHRONOUS DATA TIMING
DO VOH (Program) VOL Note: Status Valid Time (TSV) is relative to CS.
DS21929D-page 6
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
TABLE 2-3:
Instruction SB
INSTRUCTION SET FOR 93XX46A/B/C
Opcode Address Data In Data Out Req. CLK Cycles
93XX46B OR 93XX46C WITH ORG = 1
ERASE ERAL EWDS EWEN READ WRITE WRAL 1 1 1 1 1 1 1 11 00 00 00 10 01 00
(16-BIT WORD ORGANIZATION)
A5 A4 A3 A2 A1 A0 1 0 1 0 0 1 x x x x x x x x x x x x -- -- -- -- -- (RDY/BSY) (RDY/BSY) High-Z High-Z D15-D0 9 9 9 9 25 25 25
A5 A4 A3 A2 A1 A0
A5 A4 A3 A2 A1 A0 D15-D0 (RDY/BSY) 0 1 x x x x D15-D0 (RDY/BSY)
93XX46A OR 93XX46C WITH ORG = 0
ERASE ERAL EWDS EWEN READ WRITE WRAL 1 1 1 1 1 1 1 11 00 00 00 10 01 00
(8-BIT WORD ORGANIZATION)
A6 A5 A4 A3 A2 A1 A0 1 0 1 0 0 1 x x x x x x x x x x x x x x x -- -- -- -- -- D7-D0 D7-D0 (RDY/BSY) (RDY/BSY) High-Z High-Z D7-D0 (RDY/BSY) (RDY/BSY) 10 10 10 10 18 18 18
A6 A5 A4 A3 A2 A1 A0 A6 A5 A4 A3 A2 A1 A0 0 1 x x x x x
TABLE 2-4:
Instruction SB
INSTRUCTION SET FOR 93XX56A/B/C
Opcode Address Data In Data Out Req. CLK Cycles
93XX56B OR 93XX56C WITH ORG = 1
ERASE ERAL EWDS EWEN READ WRITE WRAL 1 1 1 1 1 1 1 11 00 00 00 10 01 00 x 1 0 1 x x 0
(16-BIT WORD ORGANIZATION)
A6 A5 A4 A3 A2 A1 A0 0 0 1 x x x x x x x x x x x x x x x x x x -- -- -- -- -- (RDY/BSY) (RDY/BSY) High-Z High-Z D15-D0 (RDY/BSY) (RDY/BSY) 11 11 11 11 27 27 27
A6 A5 A4 A3 S2 A1 A0
A6 A5 A4 A3 S2 A1 A0 D15-D0 1 x x x x x x D15-D0
93XX56A OR 93XX56C WITH ORG = 0
ERASE ERAL EWDS EWEN READ WRITE WRAL 1 1 1 1 1 1 1 11 00 00 00 10 01 00 x 1 0 1 x x 0 0 0 1
(8-BIT WORD ORGANIZATION)
A7 A6 A5 A4 A3 A2 A1 A0 x x x x x x x x x x x x x x x x x x x x x -- -- -- -- -- D7-D0 D7-D0 (RDY/BSY) (RDY/BSY) High-Z High-Z D7-D0 (RDY/BSY) (RDY/BSY) 12 12 12 12 20 20 20
A7 A6 A5 A4 A3 A2 A1 A0 A7 A6 A5 A4 A3 A2 A1 A0 1 x x x x x x x
(c) 2007 Microchip Technology Inc.
DS21929D-page 7
93XX46X/56X/66X/76X/86X
TABLE 2-5:
Instruction SB
INSTRUCTION SET FOR 93XX66A/B/C
Opcode Address Data In Data Out Req. CLK Cycles
93XX66B OR 93XX66C WITH ORG = 1
ERASE ERAL EWDS EWEN READ WRITE WRAL 1 1 1 1 1 1 1 11 00 00 00 10 01 00 1 0 1
(16-BIT WORD ORGANIZATION)
A7 A6 A5 A4 A3 A2 A1 A0 0 0 1 x x x x x x x x x x x x x x x x x x -- -- -- -- -- D15-D0 D15-D0 (RDY/BSY) (RDY/BSY) High-Z High-Z D15-D0 (RDY/BSY) (RDY/BSY) 11 11 11 11 27 27 27
A7 A6 A5 A4 A3 A2 A1 A0 A7 A6 A5 A4 A3 A2 A1 A0 0 1 x x x x x x
93XX66A OR 93XX66C WITH ORG = 0
ERASE ERAL EWDS EWEN READ WRITE WRAL 1 1 1 1 1 1 1 11 00 00 00 10 01 00 1 0 1 0 0 1
(8-BIT WORD ORGANIZATION)
-- -- -- -- -- D7-D0 D7-D0 (RDY/BSY) (RDY/BSY) High-Z High-Z D7-D0 (RDY/BSY) (RDY/BSY) 12 12 12 12 20 20 20 x x x x x x x x x x x x x x x x x x x x x
A8 A7 A6 A5 A4 A3 A2 A1 A0
A8 A7 A6 A5 A4 A3 A2 A1 A0 A8 A7 A6 A5 A4 A3 A2 A1 A0 0 1 x x x x x x x
TABLE 2-6:
Instruction SB
INSTRUCTION SET FOR 93XX76A/B/C
Opcode Address Data In Data Out Req. CLK Cycles
93XX76B OR 93XX76C WITH ORG = 1
ERASE ERAL EWDS EWEN READ WRITE WRAL 1 1 1 1 1 1 1 11 00 00 00 10 01 00 x 1 0 1 x x 0 0 0 1 x x x
(16-BIT WORD ORGANIZATION)
-- -- -- -- -- D15-D0 D15-D0 (RDY/BSY) (RDY/BSY) High-Z High-Z D15-D0 (RDY/BSY) (RDY/BSY) 13 13 13 13 29 29 29 x x x x x x x x x x x x x x x x x x x x x
A8 A7 A6 A5 A4 A3 A2 A1 A0
A8 A7 A6 A5 A4 A3 A2 A1 A0 A8 A7 A6 A5 A4 A3 A2 A1 A0 1 x x x x x x x x
93XX76A OR 93XX76C WITH ORG = 0
ERASE ERAL EWDS EWEN READ WRITE WRAL 1 1 1 1 1 1 1 11 00 00 00 10 01 00 x 1 0 1 x x 0 0 0 1 x x x x x x
(8-BIT WORD ORGANIZATION)
-- -- -- -- -- D7-D0 D7-D0 (RDY/BSY) (RDY/BSY) High-Z High-Z D7-D0 (RDY/BSY) (RDY/BSY) 14 14 14 14 22 22 22 x x x x x x x x x x x x x x x x x x x x x
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 1 x x x x x x x x x
DS21929D-page 8
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
TABLE 2-7:
Instruction
INSTRUCTION SET FOR 93XX86A/B/C
SB Opcode Address Data In Data Out Req. CLK Cycles
93XX86B OR 93XX86C WITH ORG = 1
ERASE ERAL EWDS EWEN READ WRITE WRAL 1 1 1 1 1 1 1 11 00 00 00 10 01 00 1 0 1 0 0 1 x x x
(16-BIT WORD ORGANIZATION)
-- -- -- -- -- D15-D0 D15-D0 (RDY/BSY) (RDY/BSY) High-Z High-Z D15-D0 (RDY/BSY) (RDY/BSY) 13 13 13 13 29 29 29 x x x x x x x x x x x x x x x x x x x x x
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 0 1 x x x x x x x x
93XX86A OR 93XX86C WITH ORG = 0
ERASE ERAL EWDS EWEN READ WRITE WRAL 1 1 1 1 1 1 1 11 00 00 00 10 01 00 1 0 1 0 0 1 x x x x x x
(8-BIT WORD ORGANIZATION)
-- -- -- -- -- D7-D0 D7-D0 (RDY/BSY) (RDY/BSY) High-Z High-Z D7-D0 (RDY/BSY) (RDY/BSY) 14 14 14 14 22 22 22 x x x x x x x x x x x x x x x x x x x x x
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 0 1 x x x x x x x x x
(c) 2007 Microchip Technology Inc.
DS21929D-page 9
93XX46X/56X/66X/76X/86X
3.0 FUNCTIONAL DESCRIPTION
3.3 Data Protection
When the ORG pin is connected to VCC, the (x16) organization is selected. When it is connected to ground, the (x8) organization is selected. Instructions, addresses and write data are clocked into the DI pin on the rising edge of the clock (CLK). The DO pin is normally held in a High-Z state except when reading data from the device, or when checking the Ready/Busy status during a programming operation. The Ready/Busy status can be verified during an Erase/Write operation by polling the DO pin; DO low indicates that programming is still in progress, while DO high indicates the device is ready. DO will enter the High-Z state on the falling edge of CS. All modes of operation are inhibited when VCC is below a typical voltage of 1.5V for `93AAXX' and `93LCXX' devices or 3.8V for `93CXX' devices. The EWEN and EWDS commands give additional protection against accidentally programming during normal operation. Note: For added protection, an EWDS command should be performed after every write operation and an external 10 k pull-down protection resistor should be added to the CS pin.
3.1
Start Condition
The Start bit is detected by the device if CS and DI are both high with respect to the positive edge of CLK for the first time. Before a Start condition is detected, CS, CLK and DI may change in any combination (except to that of a Start condition), without resulting in any device operation (Read, Write, Erase, EWEN, EWDS, ERAL or WRAL). As soon as CS is high, the device is no longer in Standby mode. An instruction following a Start condition will only be executed if the required opcode, address and data bits for any particular instruction are clocked in. Note: When preparing to transmit an instruction, either the CLK or DI signal levels must be at a logic low as CS is toggled active high.
After power-up, the device is automatically in the EWDS mode. Therefore, an EWEN instruction must be performed before the initial ERASE or WRITE instruction can be executed. Note: To prevent accidental writes to the array in the 93XX76C/86C devices, set the PE pin to a logic low.
Block Diagram
VCC VSS
HV Generator
I/O Control Logic
Memory Control Logic
X Dec
EEPROM Array Byte Latches
3.2
Data In/Data Out (DI/DO)
Y Decoder DI DO CS CLK ORG(1) PE(2)
It is possible to connect the Data In and Data Out pins together. However, with this configuration it is possible for a "bus conflict" to occur during the "dummy zero" that precedes the read operation, if A0 is a logic high level. Under such a condition the voltage level seen at Data Out is undefined and will depend upon the relative impedances of Data Out and the signal source driving A0. The higher the current sourcing capability of the driver, the higher the voltage at the Data Out pin. In order to limit this current, a resistor should be connected between DI and DO.
Sense Amp. R/W Control
Note 1: ORG pin: Only on 93XX46C/56C/66C/76C/86C. 2: PE pin: Only on 93XX76C/86C.
DS21929D-page 10
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
3.4 ERASE
The ERASE instruction forces all data bits of the specified address to the logical `1' state. CS is brought low following the loading of the last address bit. This falling edge of the CS pin initiates the self-timed programming cycle, except on `93CXX' devices where the rising edge of CLK before the last address bit initiates the write cycle. The DO pin indicates the Ready/Busy status of the device if CS is brought high after a minimum of 250 ns low (TCSL). DO at logical `0' indicates that programming is still in progress. DO at logical `1' indicates that the register at the specified address has been erased and the device is ready for another instruction. Note: After the Erase cycle is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO.
FIGURE 3-1:
ERASE TIMING FOR 93AAXX AND 93LCXX DEVICES
TCSL
CS
Check Status
CLK
DI High-Z
1
1
1
AN
AN-1 AN-2
***
A0
TSV DO BUSY TWC Ready
TCZ High-Z
FIGURE 3-2:
ERASE TIMING FOR 93CXX DEVICES
TCSL
CS
Check Status
CLK
DI High-Z
1
1
1
AN
AN-1 AN-2
***
A0
TSV DO Busy TWC Ready
TCZ
High-Z
(c) 2007 Microchip Technology Inc.
DS21929D-page 11
93XX46X/56X/66X/76X/86X
3.5 ERASE ALL (ERAL)
The Erase All (ERAL) instruction will erase the entire memory array to the logical `1' state. The ERAL cycle is identical to the Erase cycle, except for the different opcode. The ERAL cycle is completely self-timed and commences at the falling edge of the CS, except on `93CXX' devices where the rising edge of CLK before the last data bit initiates the write cycle. Clocking of the CLK pin is not necessary after the device has entered the ERAL cycle. The DO pin indicates the Ready/Busy status of the device, if CS is brought high after a minimum of 250 ns low (TCSL). VCC must be 4.5V for proper operation of ERAL. Note: After the ERAL command is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO.
FIGURE 3-3:
ERAL TIMING FOR 93AAXX AND 93LCXX DEVICES
TCSL
CS
Check Status
CLK
DI High-Z
1
0
0
1
0
X
***
X
TSV DO Busy TEC Vcc must be 4.5V for proper operation of ERAL. Ready
TCZ High-Z
FIGURE 3-4:
ERAL TIMING FOR 93CXX DEVICES
TCSL
CS
Check Status
CLK
DI High-Z
1
0
0
1
0
X
***
X
TSV DO Busy TEC Ready
TCZ High-Z
DS21929D-page 12
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
3.6 ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)
The 93XX series devices power-up in the Erase/Write Disable (EWDS) state. All programming modes must be preceded by an Erase/Write Enable (EWEN) instruction. Once the EWEN instruction is executed, programming remains enabled until an EWDS instruction is executed or VCC is removed from the device. To protect against accidental data disturbance, the EWDS instruction can be used to disable all Erase/Write functions and should follow all programming operations. Execution of a READ instruction is independent of both the EWEN and EWDS instructions.
FIGURE 3-5:
EWDS TIMING
TCSL
CS
CLK
DI
1
0
0
0
0
x
***
x
FIGURE 3-6:
EWEN TIMING
TCSL
CS
CLK
DI
1
0
0
1
1
x
***
x
(c) 2007 Microchip Technology Inc.
DS21929D-page 13
93XX46X/56X/66X/76X/86X
3.7 READ
The READ instruction outputs the serial data of the addressed memory location on the DO pin. A dummy zero bit precedes the 8-bit (If ORG pin is low or A-version devices) or 16-bit (If ORG pin is high or B-version devices) output string. The output data bits will toggle on the rising edge of the CLK and are stable after the specified time delay (TPD). Sequential read is possible when CS is held high. The memory data will automatically cycle to the next register and output sequentially.
FIGURE 3-7:
CS
READ TIMING
CLK DI
1 1 0 An *** A0
DO
High-Z
0
Dx
***
D0
Dx
***
D0
Dx
***
D0
DS21929D-page 14
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
3.8 WRITE
The WRITE instruction is followed by 8 bits (If ORG is low or A-version devices) or 16 bits (If ORG pin is high or B-version devices) of data which are written into the specified address. For 93AAXX and 93LCXX devices, after the last data bit is clocked into DI, the falling edge of CS initiates the self-timed auto-erase and programming cycle. For 93CXX devices, the self-timed autoerase and programming cycle is initiated by the rising edge of CLK on the last data bit. The DO pin indicates the Ready/Busy status of the device, if CS is brought high after a minimum of 250 ns low (TCSL). DO at logical `0' indicates that programming is still in progress. DO at logical `1' indicates that the register at the specified address has been written with the data specified and the device is ready for another instruction. Note: For devices with PE functionality such as the 93XX76C or 93XX86C, the write sequence requires a logic high signal on the PE pin prior to the rising edge of clock on the last data bit.
Note:
After the Write cycle is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO.
FIGURE 3-8:
WRITE TIMING FOR 93AAXX AND 93LCXX DEVICES
TCSL
CS
CLK
DI
1
0
1
An
***
A0
Dx
***
D0
TSV DO High-Z Busy Twc Ready
TCZ High-Z
FIGURE 3-9:
CS
WRITE TIMING FOR 93CXX DEVICES
TCSL
CLK
DI
1
0
1
An
***
A0
Dx
***
D0
TSV DO High-Z Busy Twc Ready
TCZ High-Z
(c) 2007 Microchip Technology Inc.
DS21929D-page 15
93XX46X/56X/66X/76X/86X
3.9 WRITE ALL (WRAL)
The Write All (WRAL) instruction will write the entire memory array with the data specified in the command. For 93AAXX and 93LCXX devices, after the last data bit is clocked into DI, the falling edge of CS initiates the self-timed auto-erase and programming cycle. For 93CXX devices, the self-timed auto-erase and programming cycle is initiated by the rising edge of CLK on the last data bit. Clocking of the CLK pin is not necessary after the device has entered the WRAL cycle. The WRAL command does include an automatic ERAL cycle for the device. Therefore, the WRAL instruction does not require an ERAL instruction, but the chip must be in the EWEN status. The DO pin indicates the Ready/Busy status of the device if CS is brought high after a minimum of 250 ns low (TCSL). VCC must be 4.5V for proper operation of WRAL. Note: For devices with PE functionality such as the 93XX76C or 93XX86C, the write sequence requires a logic high signal on the PE pin prior to the rising edge of clock on the last data bit.
Note:
After the Write All cycle is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO.
FIGURE 3-10:
WRAL TIMING FOR 93AAXX AND 93LCXX DEVICES
TCSL
CS
CLK
DI
1
0
0
0
1
X
***
x
Dx
***
D0
TSV DO High-Z Busy TWL VCC must be 4.5V for proper operation of WRAL. Ready
TCZ
HIGH-Z
FIGURE 3-11:
WRAL TIMING FOR 93CXX DEVICES
TCSL
CS
CLK
DI
1
0
0
0
1
X
***
x
Dx
***
D0
TSV DO High-Z Busy Ready
TCZ
HIGH-Z
TWL
DS21929D-page 16
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
4.0 PIN DESCRIPTIONS
PIN DESCRIPTIONS
SOIC/PDIP/MSOP/ TSSOP/DFN 1 2 3 4 5 6 SOT-23 5 4 3 1 2 N/A Chip Select Serial Clock Data In Data Out Ground Organization (93XX46C/56C/66C/76C/86C) No connect on 93XXA/B devices Program Enable (93XX76C/86C) No connect on 93XXA/B devices Power Supply Function
TABLE 4-1:
Name CS CLK DI DO VSS ORG NC
(1)
PE NC(1) VCC
7 8
N/A 6
Note 1: With no internal connection, logic levels on NC pins are "don't cares."
4.1
Chip Select (CS)
A high level selects the device; a low level deselects the device and forces it into Standby mode. However, a programming cycle which is already in progress will be completed, regardless of the Chip Select (CS) input signal. If CS is brought low during a program cycle, the device will go into Standby mode as soon as the programming cycle is completed. CS must be low for 250 ns minimum (TCSL) between consecutive instructions. If CS is low, the internal control logic is held in a Reset status.
After detection of a Start condition the specified number of clock cycles (respectively low-to-high transitions of CLK) must be provided. These clock cycles are required to clock in all required opcode, address and data bits before an instruction is executed. CLK and DI then become "don't care" inputs waiting for a new Start condition to be detected.
4.3
Data In (DI)
Data In (DI) is used to clock in a Start bit, opcode, address and data synchronously with the CLK input.
4.2
Serial Clock (CLK)
4.4
Data Out (DO)
The Serial Clock is used to synchronize the communication between a master device and the 93XX series device. Opcodes, address and data bits are clocked in on the positive edge of CLK. Data bits are also clocked out on the positive edge of CLK. CLK can be stopped anywhere in the transmission sequence (at high or low level) and can be continued anytime with respect to Clock High Time (TCKH) and Clock Low Time (TCKL). This gives the controlling master freedom in preparing opcode, address and data. CLK is a "don't care" if CS is low (device deselected). If CS is high, but the Start condition has not been detected (DI = 0), any number of clock cycles can be received by the device without changing its status (i.e., waiting for a Start condition). CLK cycles are not required during the self-timed Write (i.e., auto Erase/Write) cycle.
Data Out (DO) is used in the Read mode to output data synchronously with the CLK input (TPD after the positive edge of CLK). This pin also provides Ready/Busy status information during Erase and Write cycles. Ready/Busy status information is available on the DO pin if CS is brought high after being low for minimum Chip Select Low Time (TCSL) and an erase or write operation has been initiated. The Status signal is not available on DO, if CS is held low during the entire Erase or Write cycle. In this case, DO is in the High-Z mode. If status is checked after the Erase/Write cycle, the data line will be high to indicate the device is ready. Note: After the Read cycle is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO.
(c) 2007 Microchip Technology Inc.
DS21929D-page 17
93XX46X/56X/66X/76X/86X
4.5 Organization (ORG) 4.6 Program Enable (PE)
When the ORG pin is connected to VCC or Logic HI, the (x16) memory organization is selected. When the ORG pin is tied to VSS or Logic LO, the (x8) memory organization is selected. For proper operation, ORG must be tied to a valid logic level. For devices without the ORG functionality, there is no internal connection to the ORG pin. In these devices the functionality has been set at the factory to support a single word size. `A' series devices - x8 organization `B' series devices - x16 organization A logic level on the PE pin will enable or disable the ability to write data to the memory array in only the 8-lead 93XX76C and 93XX86C devices. For all other devices the PE function is not present and the PE pin is a no connect. When driving the PE pin to a logic High, the device can be programmed, but when the PE pin is driven Low, programming is inhibited. This pin is used in parallel with the EWEN/EWDS latch to protect the memory array from inadvertent writes, as shown in Table 4-2. In either the 93XX76C or 93XX86C devices, the PE pin must be tied to a specific logic level and cannot be floated. In all other devices without the PE function, the PE pin has no internal connections and programming is always enabled.
TABLE 4-2:
WRITE PROTECTION SCHEME
PE Pin* 1 1 0 0 Array WRITE Yes No No No Enabled Disabled Enabled Disabled
EWEN/EWDS Latch
* PE pin level does not alter the state of the EWEN/EWDS latch. Note: For devices with PE functionality such as 93XX76C or 93XX86C, the write sequence requires a logic high signal on the PE pin prior to the rising edge of clock on the last data bit.
DS21929D-page 18
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
APPENDIX A:
Revision A
Original release of document. Combined all the 93-Series Microwire Serial EEPROM device data sheets.
REVISION HISTORY
Revision B
Revised 2x3 (MC) DFN package drawing.
Revision C
Correction to Table 2-6, 93XX76A (EWDS).
Revision D (03/2007)
Revised Description; Delete Pb-free notes; Replaced Package Drawings; Revised Product ID System.
(c) 2007 Microchip Technology Inc.
DS21929D-page 19
93XX46X/56X/66X/76X/86X
5.0
5.1
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP
XXXXXXXX TXXXXNNN YYWW
Example: Pb-free
93LC46A I/P e3 IL7 0528
3-Wire 8-Lead PDIP Package Marking Part 93AA46A 93AA46B 93AA46C 93AA56A 93AA56B 93AA56C 93AA66A 93AA66B 93AA66C 93AA76A 93AA76B 93AA76C 93AA86A 93AA86B 93AA86C Note: Line 1 Marking 93AA46A 93AA46B 93AA46C 93AA56A 93AA56B 93AA56C 93AA66A 93AA66B 93AA66C 93AA76A 93AA76B 93AA76C 93AA86A 93AA86B 93AA86C Part 93LC46A 93LC46B 93LC46C 93LC56A 93LC56B 93LC56C 93LC66A 93LC66B 93LC66C 93LC76A 93LC76B 93LC76C 93LC86A 93LC86B 93LC86C Line 1 Marking 93LC46A 93LC46B 93LC46C 93LC56A 93LC56B 93LC56C 93LC66A 93LC66B 93LC66C 93LC76A 93LC76B 93LC76C 93LC86A 93LC86B 93LC86C Part 93C46A 93C46B 93C46C 93C56A 93C56B 93C56C 93C66A 93C66B 93C66C 93C76A 93C76B 93C76C 93C86A 93C86B 93C86C Line 1 Marking 93C46A 93C46B 93C46C 93C56A 93C56B 93C56C 93C66A 93C66B 93C66C 93C76A 93C76B 93C76C 93C86A 93C86B 93C86C
Temperature range on second line. Legend: XX...X T Y YY WW NNN Part number or part number code Temperature (I, E) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn)
e3
Note:
For very small packages with no room for the Pb-free JEDEC designator e3 , the marking will only appear on the outer carton or reel label. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
Note:
DS21929D-page 20
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
8-Lead SOIC Example: Pb-free
XXXXXXXT XXXXYYWW NNN
93LC46AI SN e3 0528 1L7
3-Wire 8-Lead SOIC (SN) Package Marking Part 93AA46A 93AA46B 93AA46C 93AA56A 93AA56B 93AA56C 93AA66A 93AA66B 93AA66C 93AA76A 93AA76B 93AA76C 93AA86A 93AA86B 93AA86C Note: Line 1 Marking 93AA46AT 93AA46BT 93AA46CT 93AA56AT 93AA56BT 93AA56CT 93AA66AT 93AA66BT 93AA66CT 93AA76AT 93AA76BT 93AA76CT 93AA86AT 93AA86BT 93AA86CT Part 93LC46A 93LC46B 93LC46C 93LC56A 93LC56B 93LC56C 93LC66A 93LC66B 93LC66C 93LC76A 93LC76B 93LC76C 93LC86A 93LC86B 93LC86C Line 1 Marking 93LC46AT 93LC46BT 93LC46CT 93LC56AT 93LC56BT 93LC56CT 93LC66AT 93LC66BT 93LC66CT 93LC76AT 93LC76BT 93LC76CT 93LC86AT 93LC86BT 93LC86CT Part 93C46A 93C46B 93C46C 93C56A 93C56B 93C56C 93C66A 93C66B 93C66C 93C76A 93C76B 93C76C 93C86A 93C86B 93C86C Line 1 Marking 93C46AT 93C46BT 93C46CT 93C56AT 93C56BT 93C56CT 93C66AT 93C66BT 93C66CT 93C76AT 93C76BT 93C76CT 93C86AT 93C86BT 93C86CT
T = Temperature Range: I = Industrial, E = Extended
Legend: XX...X T Y YY WW NNN
e3
Note:
Part number or part number code Temperature (I, E) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn)
For very small packages with no room for the Pb-free JEDEC designator e3 , the marking will only appear on the outer carton or reel label. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
Note:
(c) 2007 Microchip Technology Inc.
DS21929D-page 21
93XX46X/56X/66X/76X/86X
8-Lead 2x3 DFN
XXX YWW NN
Example:
304 506 L7
3-Wire 2x3 DFN Package Marking Part 93AA46A 93AA46B 93AA46C 93AA56A 93AA56B 93AA56C 93AA66A 93AA66B 93AA66C 93AA76C 93AA86C Industrial Line 1 Marking 301 311 321 331 341 351 361 371 381 3B1 3E1 E-Temp Line 1 Marking 302 312 322 332 342 352 362 372 382 3B2 3E2 Part 93LC46A 93LC46B 93LC46C 93LC56A 93LC56B 93LC56C 93LC66A 93LC66B 93LC66C 93LC76C 93LC86C Industrial Line 1 Marking 304 314 324 334 344 354 364 374 384 3B4 3E4 E-Temp Line 1 Marking 305 315 325 335 345 355 365 375 385 3B5 3E5 Part 93C46A 93C46B 93C46C 93C56A 93C56B 93C56C 93C66A 93C66B 93C66C 93C76C 93C86C Industrial Line 1 Marking 307 317 327 337 347 357 367 377 387 3B7 3E7 E-Temp Line 1 Marking 308 318 328 338 348 358 368 378 388 3B8 3E8
Legend: XX...X T Y YY WW NNN
e3
Note:
Part number or part number code Temperature (I, E) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn)
For very small packages with no room for the Pb-free JEDEC designator e3 , the marking will only appear on the outer carton or reel label. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
Note:
DS21929D-page 22
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
6-Lead SOT-23
XXNN
Example:
1EL7
3-Wire 6-Lead SOT-23 Package Marking Part 93AA46A 93AA46B 93AA56A 93AA56B 93AA66A 93AA66B 93AA76A 93AA76B 93AA86A 93AA86B Industrial Line 1 Marking 1BNN 1LNN 2BNN 2LNN 3BNN 3LNN 4BNN 4LNN 5BNN 5LNN E-Temp Line 1 Marking 1CNN 1MNN 2CNN 2MNN 3CNN 3MNN 4CNN 4MNN 5CNN 5MNN Part 93LC46A 93LC46B 93LC56A 93LC56B 93LC66A 93LC66B 93LC76A 93LC76B 93LC86A 93LC86B Industrial Line 1 Marking 1ENN 1PNN 2ENN 2PNN 3ENN 3PNN 4ENN 4PNN 5ENN 5PNN E-Temp Line 1 Marking 1FNN 1RNN 2FNN 2RNN 3FNN 3RNN 4FNN 4RNN 5FNN 5RNN Part 93C46A 93C46B 93C56A 93C56B 93C66A 93C66B 93C76A 93C76B 93C86A 93C86B Industrial Line 1 Marking 1HNN 1TNN 2HNN 2TNN 3HNN 3TNN 4HNN 4TNN 5HNN 5TNN E-Temp Line 1 Marking 1JNN 1UNN 2JNN 2UNN 3JNN 3UNN 4JNN 4UNN 5JNN 5UNN
Legend: XX...X T Y YY WW NNN
e3
Note:
Part number or part number code Temperature (I, E) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn)
For very small packages with no room for the Pb-free JEDEC designator e3 , the marking will only appear on the outer carton or reel label. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
Note:
(c) 2007 Microchip Technology Inc.
DS21929D-page 23
93XX46X/56X/66X/76X/86X
8-Lead MSOP (150 mil) Example:
3L46AI 5281L7
XXXXXXT YWWNNN
3-Wire 8-Lead MSOP Package Marking Part 93AA46A 93AA46B 93AA46C 93AA56A 93AA56B 93AA56C 93AA66A 93AA66B 93AA66C 93AA76A 93AA76B 93AA76C 93AA86A 93AA86B 93AA86C Note: Line 1 Marking 3A46AT 3A46BT 3A46CT 3A56AT 3A56BT 3A56CT 3A66AT 3A66BT 3A66CT 3A76AT 3A76BT 3A76CT 3A86AT 3A86BT 3A86CT Part 93LC46A 93LC46B 93LC46C 93LC56A 93LC56B 93LC56C 93LC66A 93LC66B 93LC66C 93LC76A 93LC76B 93LC76C 93LC86A 93LC86B 93LC86C Line 1 Marking 3L46AT 3L46BT 3L46CT 3L56AT 3L56BT 3L56CT 3L66AT 3L66BT 3L66CT 3L76AT 3L76BT 3L76CT 3L86AT 3L86BT 3L86CT Part 93C46A 93C46B 93C46C 93C56A 93C56B 93C56C 93C66A 93C66B 93C66C 93C76A 93C76B 93C76C 93C86A 93C86B 93C86C Line 1 Marking 3C46AT 3C46BT 3C46CT 3C56AT 3C56BT 3C56CT 3C66AT 3C66BT 3C66CT 3C76AT 3C76BT 3C76CT 3C86AT 3C86BT 3C86CT
T = Temperature Range: I = Industrial, E = Extended
Legend: XX...X T Y YY WW NNN
e3
Note:
Part number or part number code Temperature (I, E) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn)
For very small packages with no room for the Pb-free JEDEC designator e3 , the marking will only appear on the outer carton or reel label. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
Note:
DS21929D-page 24
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
8-Lead TSSOP XXXX TYWW NNN Example: L46A I528 1L7
3-Wire 8-Lead TSSOP Package Marking Part 93AA46A 93AA46B 93AA46C 93AA56A 93AA56B 93AA56C 93AA66A 93AA66B 93AA66C 93AA76A 93AA76B 93AA76C 93AA86A 93AA86B 93AA86C Note: Line 1 Marking A46A A46B A46C A56A A56B A56C A66A A66B A66C A76A A76B A76C A86A A86B A86C Part 93LC46A 93LC46B 93LC46C 93LC56A 93LC56B 93LC56C 93LC66A 93LC66B 93LC66C 93LC76A 93LC76B 93LC76C 93LC86A 93LC86B 93LC86C Line 1 Marking L46A L46B L46C L56A L56B L56C L66A L66B L66C L76A L76B L76C L86A L86B L86C Part 93C46A 93C46B 93C46C 93C56A 93C56B 93C56C 93C66A 93C66B 93C66C 93C76A 93C76B 93C76C 93C86A 93C86B 93C86C Line 1 Marking C46A C46B C46C C56A C56B C56C C66A C66B C66C C76A C76B C76C C86A C86B C86C
Temperature range on second line.
Legend: XX...X T Y YY WW NNN
e3
Note:
Part number or part number code Temperature (I, E) Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn)
For very small packages with no room for the Pb-free JEDEC designator e3 , the marking will only appear on the outer carton or reel label. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
Note:
(c) 2007 Microchip Technology Inc.
DS21929D-page 25
93XX46X/56X/66X/76X/86X
8-Lead Plastic Dual In-Line (P or PA) - 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
N
NOTE 1 E1
1
2 D
3 E A2
A
A1 e b1 b
L
c
eB
Units Dimension Limits Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing N e A A2 A1 E E1 D L c b1 b eB - .115 .015 .290 .240 .348 .115 .008 .040 .014 - MIN
INCHES NOM 8 .100 BSC - .130 - .310 .250 .365 .130 .010 .060 .018 - .210 .195 - .325 .280 .400 .150 .015 .070 .022 MAX
.430 Notes: 1. Pin 1 visual index feature may vary, but must be located with the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-018B
DS21929D-page 26
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
8-Lead Plastic Small Outline (SN or OA) - Narrow, 3.90 mm Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
D e N
E E1
NOTE 1 1 2 3 b h c h
A
A2
A1
L L1
Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer (optional) Foot Length Footprint Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom N e A A2 A1 E E1 D h L L1 c b 0 0.17 0.31 5 5 0.25 0.40 - 1.25 0.10 MIN
MILLIMETERS NOM 8 1.27 BSC - - - 6.00 BSC 3.90 BSC 4.90 BSC - - 1.04 REF - - - - - 8 0.25 0.51 15 0.50 1.27 1.75 - 0.25 MAX
15 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-057B
(c) 2007 Microchip Technology Inc.
DS21929D-page 27
93XX46X/56X/66X/76X/86X
8-Lead Plastic Dual Flat, No Lead Package (MC) - 2x3x0.9 mm Body [DFN]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
e N L
D N
b
K E E2
EXPOSED PAD NOTE 1 1 2 D2 TOP VIEW BOTTOM VIEW 2 1 NOTE 1
A
A3
A1
NOTE 2
Units Dimension Limits MIN MILLIMETERS NOM 8 0.50 BSC 0.80 0.00 0.90 0.02 0.20 REF 2.00 BSC 3.00 BSC 1.30 1.50 0.18 0.30 0.20 - - 0.25 0.40 - 1.75 1.90 0.30 0.50 - 1.00 0.05 MAX
Number of Pins Pitch Overall Height Standoff Contact Thickness Overall Length Overall Width Exposed Pad Length Exposed Pad Width Contact Width Contact Length Contact-to-Exposed Pad
N e A A1 A3 D E D2 E2 b L K
Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package may have one or more exposed tie bars at ends. 3. Package is saw singulated. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-123B
DS21929D-page 28
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
6-Lead Plastic Small Outline Transistor (CH or OT) [SOT-23]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
b N 4
E E1 PIN 1 ID BY LASER MARK
1
2 e e1 D
3
A
A2
c
A1
L L1
Units Dimension Limits MIN MILLIMETERS NOM 6 0.95 BSC 1.90 BSC 0.90 0.89 0.00 2.20 1.30 2.70 0.10 0.35 0 0.08 - - - - - - - - - - 1.45 1.30 0.15 3.20 1.80 3.10 0.60 0.80 30 0.26 MAX
Number of Pins Pitch Outside Lead Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint Foot Angle Lead Thickness
N e e1 A A2 A1 E E1 D L L1 c
Lead Width b 0.20 - 0.51 Notes: 1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.127 mm per side. 2. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-028B
(c) 2007 Microchip Technology Inc.
DS21929D-page 29
93XX46X/56X/66X/76X/86X
8-Lead Plastic Micro Small Outline Package (MS or UA) [MSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
D N
E E1
NOTE 1 1 2 b A A2 c
e
A1
Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint Foot Angle Lead Thickness N e A A2 A1 E E1 D L L1 c
L1
MILLIMETERS MIN NOM 8 0.65 BSC - 0.75 0.00 - 0.85 - 4.90 BSC 3.00 BSC 3.00 BSC 0.40 0 0.08 0.60 0.95 REF - - 8 0.23 0.80 1.10 0.95 0.15 MAX
L
Lead Width b 0.22 - 0.40 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-111B
DS21929D-page 30
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
8-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm Body [TSSOP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging
D N
E E1
NOTE 1
1 b
2 e c
A
A2
A1
L1
L
Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Footprint Foot Angle Lead Thickness N e A A2 A1 E E1 D L L1 c 0 0.09 4.30 2.90 0.45 - 0.80 0.05 MIN
MILLIMETERS NOM 8 0.65 BSC - 1.00 - 6.40 BSC 4.40 3.00 0.60 1.00 REF - - 8 0.20 4.50 3.10 0.75 1.20 1.05 0.15 MAX
Lead Width b 0.19 - 0.30 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-086B
(c) 2007 Microchip Technology Inc.
DS21929D-page 31
93XX46X/56X/66X/76X/86X
NOTES:
DS21929D-page 32
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
THE MICROCHIP WEB SITE
Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: * Product Support - Data sheets and errata, application notes and sample programs, design resources, user's guides and hardware support documents, latest software releases and archived software * General Technical Support - Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing * Business of Microchip - Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels: * * * * * Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Development Systems Information Line
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com
CUSTOMER CHANGE NOTIFICATION SERVICE
Microchip's customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions.
(c) 2007 Microchip Technology Inc.
DS21929D-page 33
93XX46X/56X/66X/76X/86X
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: RE: Technical Publications Manager Reader Response Total Pages Sent ________
From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y N Literature Number: DS21929D FAX: (______) _________ - _________
Device: 93XX46X/56X/66X/76X/86X Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21929D-page 34
(c) 2007 Microchip Technology Inc.
93XX46X/56X/66X/76X/86X
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. EEPROM Voltage Series 93 AA = 1.8V-5.5V LC = 2.5V-5.5V C = 4.5V-5.5V 46 = 1 Kbit 56 = 2 Kbit 66 = 4 Kbit 76 = 8 Kbit 86 = 16 Kbit A = x8 bit B = x16 bit C = Selectable Blank = Std Pkg T = Tape & Reel I = -40C to +85C E = -40C to +125C P = 8-Lead PDIP SN = 8-Lead SOIC (3.90 mm) MC = 8-Lead 2x3 DFN CH or OT = 6-Lead SOT-23 MS = 8-Lead MSOP ST = 8-Lead TSSOP Word Size Tape & Reel Temp Range
Density
Package
Examples: a) b) c) d) 93AA46A-I/MS: 1K, 128x8 Serial EEPROM, Industrial Temperature, MSOP package, 1.8V 93AA46BT-I/OT: 1K, 64x16 Serial EEPROM, SOT-23 package, tape and reel, 1.8V 93AA46CT-I/MS: 1K, 128x8 or 64x16 Serial EEPROM, MSOP package, tape and reel, 1.8V 93AA46BX-I/SN: 1K, 128x8 Serial EEPROM, Industrial temperature, SOIC package (alternate pinout), tape and reel package, 1.8V 93LC66A-I/MS: 4K, 512x8 Serial EEPROM, MSOP package, 2.5V 93LC66BT-I/OT: 4K, 256x16 Serial EEPROM, SOT-23 package, tape and reel, 2.5V 93C86AT-I/OT: 16K, 2048x8 Serial EEPROM, SOT-23 package, tape and reel, 5.0V 93C86BT-I/OT: 16K, 1024x16 Serial EEPROM, SOT-23 package, tape and reel, 5.0V 93C86CT-I/MC: 16K, 2048x8 or 1024x16 Serial EEPROM, DFN Industrial temperature, tape and reel package, 5.0V
e) f) g) h) i)
(c) 2007 Microchip Technology Inc.
DS21929D-page 35
93XX46X/56X/66X/76X/86X
NOTES:
DS21929D-page 36
(c) 2007 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2007 Microchip Technology Inc.
DS21929D-page 37
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Habour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Fuzhou Tel: 86-591-8750-3506 Fax: 86-591-8750-3521 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Shunde Tel: 86-757-2839-5507 Fax: 86-757-2839-5571 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7250 Fax: 86-29-8833-7256
ASIA/PACIFIC
India - Bangalore Tel: 91-80-4182-8400 Fax: 91-80-4182-8422 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Gumi Tel: 82-54-473-4301 Fax: 82-54-473-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Penang Tel: 60-4-646-8870 Fax: 60-4-646-5086 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350
EUROPE
Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820
12/08/06
DS21929D-page 38
(c) 2007 Microchip Technology Inc.

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